От: fpga journal update [news@fpgajournal.com]
Отправлено: 23 марта 2005 г. 2:12
Кому: Michael Dolinsky
Тема: FPGA Journal Update Vol VI No 12


a techfocus media publication :: March 22, 2005 :: volume VI, no. 12


FROM THE EDITOR

This week, our "Free Tool Friday" feature takes a closer look at the incredible amount of design tool technology you can get for very low prices from your favorite FPGA vendor. While the quality of FPGA vendor tools is improving every day, there’s still a growing market for commercial EDA software for FPGAs. With such high-performance design software available for peanuts, when does it make sense to pay for an upgrade?

Thanks for reading! If there's anything we can do to make our publications more useful to you, please let us know at: comments@fpgajournal.com

Kevin Morris – Editor
FPGA and Programmable Logic Journal


LATEST NEWS

March 22, 2005

Renesas Technology Integrates Mentor Graphics 0-In Assertion Synthesis for Assertion Based Verification Flow

SBS Technologies Launches Rugged CompactPCI-based Situational Awareness Interface Server

Net Seminar: Get the Real Story on FPGA Power Consumption

Altera Ships 10 Millionth Cyclone FPGA to Harmonic Inc.

March 21, 2005

GTC Announces Call for Papers for GSPx 2005 Conference and Expo – the Pervasive Signal Processing Event

Altera Demonstrates Industry's First FPGA Solution Enabling Video-Over-IP at CCBN

TELDIX Selects Actel's ProASIC Plus FPGAs for Multi-Processor Boards Used in the Eurofighter Project

March 17, 2005

Spectrum Signal Processing flexComm SDR-3000 Platform Selected for Wideband Electronic Warfare Application

Xilinx R&D Center in India Helping Customers Worldwide Benefit From Programmable Chip Technologies


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CURRENT FEATURE ARTICLES

Free Tool Friday
How Good are FPGA Vendor Tools?
Deeply Embedded
ESC 2005 - the FPGA View
Two Bucks
Xilinx Introduces Spartan-3E
Plug and Play Design Methodologies for FPGA-based Signal Processing
by Narinder Lall, Xilinx, Inc. and
Eric Cigan, AccelChip, Inc.

Lattice Launches XP
Non-Volatility at the Forefront of FPGA
High-Density FPGA-to-ASIC Conversions using Structured ASIC: Fills the Gap
by Rick Mosher and Bob Kirk, AMI Semiconductor, Inc.
Breakthrough Bandwidth

SerDes Hits New Heights
Making the Jump to 10G
by Abhijit Athavale and Brian Seemann, Xilinx, Inc.
Co-Verification Methodology for Platform FPGAs 
by Milan Saini, Xilinx, Inc.
and Ross Nelson, Mentor Graphics

Free Tool Friday
How Good are FPGA Vendor Tools?

What can you get for free? In this age of rapid technological evolution, it is not uncommon for valuable, cutting-edge technology to find its way into the "free cell phone" category. In an effort to market their wares, technology companies often find themselves offering high-value products at little or no cost in order to remove barriers to adoption of their principal products. Such is the case with design tools for FPGA. Most FPGA vendors offer sophisticated tool suites, either by free download or at an extremely low cost, in order to entice new designers to check out their chips and to pave the way for them to design their devices into new sockets.

Whether the tools are completely free or just very inexpensive is a matter for frivolous debate. Some vendors offer their best tools for free, but charge for support for their most expensive devices. Others offer limited capability tools for free and charge for increased capability. Either way, compared with other electronic design disciplines, you will spend a trivial percentage of your design budget on tools, while enjoying some of the best design automation capability available.

Let's say you're running an FPGA company that sells hundreds of millions of dollars worth of silicon every year. You have a great set of silicon offerings, but there are barriers between you and your customers. Anyone designing anything using that silicon has to use a suite of sophisticated EDA tools including (at least) simulation, synthesis, and place-and-route. Simulation is not a problem, since there's a thriving HDL simulation industry supported by the ASIC community that produces accessible, cost-effective tools. On the other end of the spectrum, place-and-route tools are tightly connected to your FPGA silicon architecture. As an FPGA vendor, you almost certainly need to develop and distribute tools those yourself. [more]

ANNOUNCEMENTS

Avnet introduces a new FREE, one-day seminar to provide design engineers with a deep understanding of the latest Virtex, Spartan and design tools from Xilinx. Seminar topics include how to utilize Xilinx FPGA technologies in the areas of programmable logic, connectivity, and embedded processing.
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Free Online Technical Seminar - Available On-Demand!
Learn How to Solve High-Speed Clock Network Issues with Lattice’s ispClock™. Designers today face the challenge of clock frequency generation and clock distribution in multiple clock domain systems.
Traditional clock chips provide single-point solutions for a portion of a clock network, forcing designers to select several clock devices to complete a system design. The new and unique Lattice ispClock programmable clock generator device solves a variety of clock network design issues in a single chip.
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Free Online Technical Seminar - Available On-Demand!
View this online seminar and learn how to design with a single-chip, flash-based FPGA solution that is: low cost, secure, space efficient, high performance, and easy. Low-cost FPGAs are increasingly used for low to medium density ASIC replacement. The new LatticeXP™ family brings non-volatility to low-cost FPGAs by combining flash and SRAM on a single chip, making it ideal for applications requiring high design security, minimized board-space, or "instant-on."
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